Compared to cored substrates, coreless substrate technology eliminates the fiberglass cloth used as the core layer and uses layer-to-layer insulation materials directly for wiring and packaging.
Coreless substrate technology reduces costs by eliminating the core layer. Additionally, the improved wiring capability allows for minimal limitations in the arrangement of solder ball bumps and achieves excellent high-speed transmission characteristics, improving both AC and DC power performance.
Application Description
Compared to Cored Substrate technology, Coreless Substrate technology eliminates the use of fiberglass cloth as the core layer and instead directly employs layering insulating materials, such as ABF, for wiring and packaging. The intermediate layers can optionally be replaced with adhesive prepreg to maintain the substrate strength. This is commonly seen in the assembly applications of FC-CSP (Flip Chip Chip Scale Package).
Coreless Substrate reduces costs by eliminating the core layer. Additionally, the improved wiring capability minimizes restrictions on the layout of solder ball bumps, achieving excellent high-speed transmission characteristics with improvements in both AC and DC power properties. However, the elimination of the core layer may pose risks of warpage and laminate chipping during the manufacturing process, necessitating additional support structures and precise process temperature control to prevent damage.
Lincotec possesses proprietary intellectual property that allows for effective control of the warping issues commonly associated with coreless substrate processes. Lincotec can also collaborate with customers to develop processes and conduct experimental verifications for various technologies, including Desmear, Descum, Ti etching, and Seel layer sputtering, etc. In addition to offering prototyping services for different process formulations during the research and development phase, Lincotec also maintains qualified and highly precise laboratories for sample testing.
